DS200PTBAG1A

DS200PTBAG1A is a Protective Core Terminal Board manufactured by General Electric as part of the Mark V Series used in gas turbine control systems. The signals for the core are terminated by the Protection Termination Module (PTBA), which is located in the core. On the PTBA terminal board, which is connected to the TCEB board, are input signals for the high and low-pressure shaft speeds, flame detection, generator and bus voltages, and generator currents. The core is additionally connected to the speed signals. The Turbine Trip (TCTG) board in the core is written directly after the PTBA terminal board reads the external trip input signals, generator and bus signals, and generator breaker closing signals. Through the PTBA terminal board, the TCTG board writes trip output signals and generator breaker closure signals to the device. Using a hardware jumper on the PTBA board, the TCEB board's audio alarm (horn) is powered.

PTBA CONNECTORS:

JJR - Writes the high and low-pressure shaft speed signals to the TCQE board in the core.
JM - Reads and writes the emergency trip outputs to/from the TCTG board in the core, as well as the generator breaker signals (52GL).
JN - Reads and writes the external trip signals to and from the TCTG board in the core, writes the enable signal to the horn, and reads and writes the generator breaker signals (G125P).
JU - Writes the audible alarm (horn) enable, the flame detect, and the emergency Overspeed signals to the TCEB board in the core.
JV - Writes the PT and CT current signals as well as the generator and bus voltage signals to the TCEB board in the core.
JVA - Distributes the 335 V dc from the TCEB board in the P1 core to the flame detecting devices.
JJS/T - Not frequently used.

PTBA HARDWARE CONFIGURATION:

J1 enables the horn-based audible alarm. Silence yourself off.

PRIMARY AND EMERGENCY OVERSPEED TRIP SETPOINTS:

The Mark V LM control system offers primary and emergency electronic Overspeed prevention for up to two turbine shafts on two separate levels. The Overspeed protection Big Block Language (BBL) blocks of the CSP in the R> control processor perform the primary Overspeed detection and trip initiation. These blocks make use of the turbine shaft speed sensors that are generally mounted on the P1 core's PTBA terminal board. The trip setpoints for the blocks are specified by the Control Constants. The I/O board's filter and scale (convert to the percent of rated shaft speed) the magnetic speed sensor pulses. The CSP Overspeed block starts a turbine trip when the scaled turbine shaft speed signal goes over a Control Constant setpoint. The protective processors X, Y, and Z in the protective core P1 are responsible for emergency Overspeed protection. Primary Overspeed protection has no bearing on emergency Overspeed protection. The PTBA terminal board is equipped with turbine shaft speed sensors.