IS200BPIHH1A

IS200BPIHH1A is a Bridge Personality Interface Board designed and developed by GE. The product is developed under the Drive Control series. It connects into a CABP board where it communicates through that and other boards. The BPIH board buffers control signals for the BICH board before they interface with the fiber-optic array. The board's subassembly acts as an RS-422 interface distributor for phase-related signals as they come and go from the BICH and FOSB boards. The Control Assembly Backplane links to the BPIH board, which communicates with the Bridge Interface and Control Board via CABP board signal routes. It is an auxiliary board that works with the larger Control Assembly backplane. All phase-related signals coming from or going to the FOSB or BICH boards can be interfaced and distributed by this board. This is accomplished using a fiber-optic array and twisted pairs with differential signaling.

Features

• The majority of the board's bridge inputs/outputs (I/O) are routed to the Fiber-Optic Interface Board via the BPIH board subassembly. This is accomplished on a phase-by-phase basis using three identical wires dedicated to phase A, B, and C signals.
• It is intended to communicate with the (BICH) H-Bridge Interface and Control Board via the Control Assembly Backplane. The Bridge Interface and Control board's bridge routes much of the Input/Output to the FOSB Fiber-Optic Interface board via the subassembly.
• The board has two backplane connectors. These are denoted by the letters P1 and P2. The board also has three additional connectors labeled JA through JC. These are BPIH subassembly plug connectors that mount into the faceplate connected to the circuit board.
• The board has a line of eighteen integrated circuits with a final integrated circuit near the board's center. TPC, TPX, TPB, and TPA are the designations for four sets of plated through-holes on the board.
• The front panels of the BICH board and BPIH board subassemblies contain high-density shielded connectors for these cables, ensuring shield continuity to the board rack chassis. On the BPIH board subassembly, control signals are buffered and interfaced with the FOSB board fiber-optic array through twisted pairs with differential signaling. Singular high-speed signals (such as VCO feedbacks) are terminated by a termination resistor at the receiving end.
• The RS-422 interface and distributor for all phase-related signals going to or coming from the BICH and FOSB boards is the BPIH board subassembly.
• BPIH is a subassembly on the Control Assembly Backplane that is commonly used as an auxiliary board. This board communicates with the BICH H bridge interface via three identical cables. Communication is done on a phase-by-phase basis (A/B/C).
• It is designed to fit into an Innovation series rack system. The Innovation Series is intended to fit into specific rack slots. Placing the board in the wrong slot may cause damage to the board or its components.
• Adhere to all replacement procedures outlined by the manufacturer in publications such as data sheets and manuals. If these publications are no longer available, this information is available in GE publication GEI-100417.

Application Data

• There are no fuses, test points, LED indicators, or adjustable hardware on the BPIH board subassembly.
• There are three plug connectors (JA, JB, and JC) and two backplane connectors on the BPIH board subassembly (P1 and P2).

Installation Procedure

1. Place the board in the appropriate slot on the board rack. Because the Innovation Series boards/modules are built for certain rack spaces, placing the BPIH board subassembly into the incorrect slot can cause electronics damage.
2. Begin seating the board by firmly pressing the top and bottom of the faceplate with your thumbs at the same time.
3. Tighten the screws at the top and bottom of the faceplate to finish seating the board in the slot. To verify that the board is positioned squarely, tighten the screws evenly.
4. Reconnect any electrical connections that were severed during step 3 of the board removal process.
5. Snap the control cabinet door shut.

Software

• In a ladder diagram format, application software is executed sequentially and represented in its dynamic state. Maintenance personnel have the ability to add, delete, or change analog loops, sequencing logic, tuning constants, and so on. To simplify editing, data points can be selected and dragged on the screen from one block to another.
• Other features include logic forcing, analog forcing, and frame rate trending. The documentation for application software is generated directly from the source code and printed on-site. This includes the primary elementary diagram, I/O assignments, tuning constant settings, and so on. The software maintenance tools are available in the HMI as well as as a separate software package for almost any Windows 95 or NT-based PC.

System IONet Addressing

• The DHCP servers in the controllers assign IP addresses to IONet devices. The Host ID presented to the DHCP server is determined by the board type and serial number information stored on the terminal board's serial EEPROM. The I/O module can be replaced without having to update the toolbox or controller communication IDs because the Host ID is part of the terminal board. When replacing a terminal board, the user must associate the new Host ID with the configured device. To make this process easier, ToolboxST displays a list of unidentified devices that have requested IP addresses.
• When connecting an I/O pack to a main controller, IONet should only pass through five switches in series. Any configured IONet port on a controller or I/O module is constantly sending data, allowing the detection of faulty network cables, switches, or board components to occur immediately. When a fault occurs, the controller or I/O module generates a diagnostic alarm.
• IONets are class C networks. Each is its own network with its own set of subnet addresses. The IONet IP host addresses for the controllers are fixed. The ToolboxST assigns IP addresses to the I/O packs, and the controller automatically distributes the addresses to the I/O packs via a standard Dynamic Host Configuration Protocol (DHCP) server in the controllers.

Output Processing

• The system outputs are the portions of calculated data that are transferred to external hardware interfaces and then to the various actuators that control the process. The output voting hardware votes on TMR outputs. Through simplex hardware, any system can output individual signals.
• The TMR system outputs are calculated independently by the three voting controllers. Each controller sends output to the I/O hardware associated with it (for example, the R controller sends output to the R I/O). A voting mechanism then combines the three independent outputs into a single output. Different signal types necessitate distinct methods for determining the voted value.

Circuit Protection

• Fault current protection limits the current to what the system components can handle.
• Feedback from the branch circuit system
• Protection against ground faults in floating systems
• If possible, redundant applications
• Systems with multiple power applications run the risk of applying the incorrect power to a load or interconnecting power buses. To avoid this issue, the component employs specific connector conventions. Existing terminal board designs pose the greatest risk of incorrect connection. Regardless of whether the connection is AC or DC, these boards use a three-position Mate-N-Lok for power input. In addition, the existing boards have two parallel connectors for power daisy-chain wiring within a panel.