IS200DSPXH2C

The IS200DSPXH2C is a Digital Signal Processor Control Board manufactured and designed by General Electric as part of the EX2100 Series, used in GE Drive Control Systems. It functions as the primary controller for bridge and motor regulation, gating functions in Innovation Series drives, and generator field control for the EX2100e Excitation Control. The DSPX board provides logic, processing, and interface functions, and features a high-performance digital signal processor (DSP), standard memory components, and an application-specific integrated circuit (ASIC) for custom logic functions.

Key Features and Functionalities

• Inner Loop Load Pulse Signal: Captures values from I/O sources like bridge, motor, or generator voltages and current VCOs, tachometer counters, and discrete inputs. It also synchronizes the ISBus channels, the software, and gating outputs to bridges.
• Application Loop Load Pulse Signal: Operates at a sub-multiple or multiple of the inner loop load pulse, capturing values from additional application VCOs and, optionally, tachometers.
• Stack Overflow Detection: Monitors both the foreground stack (internal memory) and background stack (external SRAM). An interrupt (INT0) is generated on overflow, and a hard reset is initiated if both stacks overflow.
• Configurable Stack Overflow Reset: A configuration register allows disabling the stack overflow reset function. A watchdog timer is periodically toggled by the DSP, and its time-out generates a hard reset. The timer's toggle interval is configurable.
• 24-bit Free-Running Timer: Provides a reference for specific system functions, running continuously to assist in timing operations.
• Differential (HIFI) Pair Inputs: Five differential pair application inputs, two of which are used as quadrature incremental tach interfaces (one with marker capability). These drive two 16-bit up/down counters that maintain their state based on input signal levels and changes.
• 5 MHz Timer and State Register: Each counter has a 5 MHz timer that resets with each increment or decrement. A state register records the direction of the last count, and capture registers store counter values upon an inner or application loop load pulse.
• Application Layer VCO Counters and Single-Channel Tach Interfaces: The five differential HIFI inputs can be used as counters or tach interfaces, where five 16-bit counters increment on decoded and filtered inputs, capturing values that the DSP reads.
• Backplane Inputs to VCO Counters: Six inputs from the backplane are digitally filtered and fed to 16-bit VCO counters, with values latched by the inner loop load pulse and readable by the DSP. These inputs are sourced from technology-specific I/O cards such as the BIC (bridge interface) or exciter interface cards.